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IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION -
IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION ( 6)Arguments
Description
limit each transmitter to deliver a max of 3 dB below the regulatory limit for the device. That is, use half power for each transmitter, so total txpower is within regulatory limits.The value "6" represents number of steps in gain table to reduce power 3 dB. Each step is 1/2 dB.
IWL_TX_POWER_CCK_COMPENSATION_B_STEP -
IWL_TX_POWER_CCK_COMPENSATION_B_STEP ( 9)Arguments
Description
When calculating txpowers for CCK, after making sure that the target power is within regulatory and saturation limits, driver must additionally back off gain by adding these values to the gain table index.
Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG, bits [3:2], 1 = B, 2 = C.
MIN_TX_GAIN_INDEX -
MIN_TX_GAIN_INDEX ()Arguments
Description
The following tables contain pair of values for setting txpower, i.e. gain settings for the output of the device's digital signal processor (DSP), and for the analog gain structure of the transmitter.
Each entry in the gain tables represents a step of 1/2 dB. Note that these are *relative* steps, not indications of absolute output power. Output power varies with temperature, voltage, and channel frequency, and also requires consideration of average power (to satisfy regulatory constraints), and peak power (to avoid distortion of the output signal).
Each entry contains two values
1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained linear value that multiplies the output of the digital signal processor, before being sent to the analog radio. 2) Radio gain. This sets the analog gain of the radio Tx path. It is a coarser setting, and behaves in a logarithmic (dB) fashion.EEPROM contains factory calibration data for txpower. This maps actual measured txpower levels to gain settings in the "well known" tables below ("well-known" means here that both factory calibration *and* the driver work with the same table).
There are separate tables for 2.4 GHz and 5 GHz bands. The 5 GHz table has an extension (into negative indexes), in case the driver needs to boost power setting for high device temperatures (higher than would be present during factory calibration). A 5 Ghz EEPROM index of "40" corresponds to the 49th entry in the table used by the driver.
IWL_TX_POWER_DEFAULT_SATURATION_24 -
IWL_TX_POWER_DEFAULT_SATURATION_24 ( 38)Arguments
Description
If EEPROM values fall outside MIN/MAX range, use default values.Saturation is the highest level that the output power amplifier can produce without significant clipping distortion. This is a "peak" power level. Different types of modulation (i.e. various "rates", and OFDM vs. CCK) require differing amounts of backoff, relative to their average power output, in order to avoid clipping distortion.
Driver must make sure that it is violating neither the saturation limit, nor the regulatory limit, when calculating Tx power settings for various rates.
Units are in half-dBm (i.e. "38" means 19 dBm).
struct iwl_tfd_frame_data -
struct iwl_tfd_frame_data {#define IWL_tb1_addr_hi_POS 0
#define IWL_tb1_addr_hi_LEN 4
#define IWL_tb1_addr_hi_SYM val1
#define IWL_tb1_len_POS 4
#define IWL_tb1_len_LEN 12
#define IWL_tb1_len_SYM val1
#define IWL_tb2_addr_lo16_POS 16
#define IWL_tb2_addr_lo16_LEN 16
#define IWL_tb2_addr_lo16_SYM val1
#define IWL_tb2_addr_hi20_POS 0
#define IWL_tb2_addr_hi20_LEN 20
#define IWL_tb2_addr_hi20_SYM val2
#define IWL_tb2_len_POS 20
#define IWL_tb2_len_LEN 12
#define IWL_tb2_len_SYM val2
};
Members
Description
Describes up to 2 buffers containing (contiguous) portions of a Tx frame. Each buffer must be on dword boundary. Up to 10 iwl_tfd_frame_data structures, describing up to 20 buffers, may be filled within a TFD (iwl_tfd_frame).
Bit fields in tb1_addr
31- 0: Tx buffer 1 address bits [31:0]
Bit fields in val1
31-16: Tx buffer 2 address bits [15:0] 15- 4: Tx buffer 1 length (bytes) 3- 0: Tx buffer 1 address bits [32:32]
Bit fields in val2
31-20: Tx buffer 2 length (bytes) 19- 0: Tx buffer 2 address bits [35:16]
struct iwl_tfd_frame -
struct iwl_tfd_frame {#define IWL_num_tbs_POS 24
#define IWL_num_tbs_LEN 5
#define IWL_num_tbs_SYM val0
};
Members
Description
Transmit Frame Descriptor (TFD)
4965 supports up to 16 Tx queues resident in host DRAM. Each Tx queue uses a circular buffer of 256 TFDs stored in host DRAM. Both driver and device share these circular buffers, each of which must be contiguous 256 TFDs x 128 bytes-per-TFD = 32 KBytes for 4965.
Driver must indicate the physical address of the base of each circular buffer via the 4965's FH_MEM_CBBC_QUEUE registers.
Each TFD contains pointer/size information for up to 20 data buffers in host DRAM. These buffers collectively contain the (one) frame described by the TFD. Each buffer must be a single contiguous block of memory within itself, but buffers may be scattered in host DRAM. Each buffer has max size of (4K - 4). The 4965 concatenates all of a TFD's buffers into a single Tx frame, up to 8 KBytes in size.
Bit fields in the control dword (val0): 31-30: # dwords (0-3) of padding required at end of frame for 16-byte bound
29
reserved 28-24: # Transmit Buffer Descriptors in TFD 23- 0: reservedA maximum of 255 (not 256!) TFDs may be on a queue waiting for Tx.
struct iwl4965_queue_byte_cnt_entry -
struct iwl4965_queue_byte_cnt_entry {#define IWL_byte_cnt_POS 0
#define IWL_byte_cnt_LEN 12
#define IWL_byte_cnt_SYM val
};
Members
Description
Byte Count Table Entry
Bit fields
15-12: reserved 11- 0: total to-be-transmitted byte count of frame (does not include command)
struct iwl4965_sched_queue_byte_cnt_tbl -
struct iwl4965_sched_queue_byte_cnt_tbl {};
Members
Description
Byte Count table
Each Tx queue uses a byte-count table containing 320 entries: one 16-bit entry for each of 256 TFDs, plus an additional 64 entries that duplicate the first 64 entries (to avoid wrap-around within a Tx window; max Tx window is 64 TFDs).
When driver sets up a new TFD, it must also enter the total byte count of the frame to be transmitted into the corresponding entry in the byte count table for the chosen Tx queue. If the TFD index is 0-63, the driver must duplicate the byte count entry in corresponding index 256-319.
"dont_care" padding puts each byte count table on a 1024-byte boundary; 4965 assumes tables are separated by 1024 bytes.
struct iwl4965_shared - handshake area for Tx and Rx
struct iwl4965_shared {#define IWL_rb_closed_stts_rb_num_POS 0
#define IWL_rb_closed_stts_rb_num_LEN 12
#define IWL_rb_closed_stts_rb_num_SYM rb_closed
#define IWL_rb_closed_stts_rx_frame_num_POS 16
#define IWL_rb_closed_stts_rx_frame_num_LEN 12
#define IWL_rb_closed_stts_rx_frame_num_SYM rb_closed
#define IWL_frame_finished_stts_rb_num_POS 0
#define IWL_frame_finished_stts_rb_num_LEN 12
#define IWL_frame_finished_stts_rb_num_SYM frm_finished
#define IWL_frame_finished_stts_rx_frame_num_POS 16
#define IWL_frame_finished_stts_rx_frame_num_LEN 12
#define IWL_frame_finished_stts_rx_frame_num_SYM frm_finished
};
Members
Description
For convenience in allocating memory, this structure combines 2 areas of DRAM which must be shared between driver and 4965. These do not need to be combined, if better allocation would result from keeping them separate:
1) The Tx byte count tables occupy 1024 bytes each (16 KBytes total for 16 queues). Driver uses SCD_DRAM_BASE_ADDR to tell 4965 where to find the first of these tables. 4965 assumes tables are 1024 bytes apart.
2) The Rx status (val0 and val1) occupies only 8 bytes. Driver uses FH_RSCSR_CHNL0_STTS_WPTR_REG to tell 4965 where to find this area. Driver reads val0 to determine the latest Receive Buffer Descriptor (RBD) that has been filled by the 4965.
Bit fields val0
31-12: Not used 11- 0: Index of last filled Rx buffer descriptor (4965 writes, driver reads)
Bit fields val1
31- 0: Not used